Interim report update

docs/interim/bibliography.bib

@@ -1,31 +0,0 @@
-@article{beldianu_ziavras_2014,
-title={ASIC Design of Shared Vector Accelerators for Multicore Processors},
-DOI={10.1109/sbac-pad.2014.13},
-journal={2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing},
-author={Beldianu, Spiridon F. and Ziavras, Sotirios G.},
-year={2014}
-},
-
-@article{dharshana_balasubramanian_arun_2016,
-title={Encrypted computation on a one instruction set architecture},
-DOI={10.1109/iccpct.2016.7530376},
-journal={2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT)},
-author={Dharshana, K. S. and Balasubramanian, Kannan and Arun, M.},
-year={2016}
-},
-
-@article{ong_ang_seng_2010,
-title={Implementation of (15, 9) Reed Solomon Minimal Instruction Set Computing on FPGA using Handel-C},
-DOI={10.1109/iccaie.2010.5735103},
-journal={2010 International Conference on Computer Applications and Industrial Electronics},
-author={Ong, Jia Jan and Ang, L.-M. and Seng, K. P.},
-year={2010}
-},
-
-@article{yokota_saso_hara-azumi_2017,
-title={One-instruction set computer-based multicore processors for energy-efficient streaming data processing},
-DOI={10.1145/3130265.3130318},
-journal={Proceedings of the 28th International Symposium on Rapid System Prototyping Shortening the Path from Specification to Prototype - RSP '17},
-author={Yokota, Minato and Saso, Kaoru and Hara-Azumi, Yuko},
-year={2017}
-}

docs/interim/references.bib

@@ -0,0 +1,92 @@
+@article{beldianu_ziavras_2014,
+	title={ASIC Design of Shared Vector Accelerators for Multicore Processors},
+	DOI={10.1109/sbac-pad.2014.13},
+	journal={2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing},
+	author={Beldianu, Spiridon F. and Ziavras, Sotirios G.},
+	year={2014}
+},
+
+@article{dharshana_balasubramanian_arun_2016,
+	title={Encrypted computation on a one instruction set architecture},
+	DOI={10.1109/iccpct.2016.7530376},
+	journal={2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT)},
+	author={Dharshana, K. S. and Balasubramanian, Kannan and Arun, M.},
+	year={2016}
+},
+
+@article{ong_ang_seng_2010,
+	title={Implementation of (15, 9) Reed Solomon Minimal Instruction Set Computing on FPGA using Handel-C},
+	DOI={10.1109/iccaie.2010.5735103},
+	journal={2010 International Conference on Computer Applications and Industrial Electronics},
+	author={Ong, Jia Jan and Ang, L.-M. and Seng, K. P.},
+	year={2010}
+},
+
+@article{yokota_saso_hara-azumi_2017,
+	title={One-instruction set computer-based multicore processors for energy-efficient streaming data processing},
+	DOI={10.1145/3130265.3130318},
+	journal={Proceedings of the 28th International Symposium on Rapid System Prototyping Shortening the Path from Specification to Prototype - RSP '17},
+	author={Yokota, Minato and Saso, Kaoru and Hara-Azumi, Yuko},
+	year={2017}
+}
+
+@article{ahmed_sakamoto_anderson_hara-azumi_2015,
+	title={Synthesizable-from-C Embedded Processor Based on MIPS-ISA and OISC},
+	DOI={10.1109/euc.2015.23},
+	journal={2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing},
+	author={Ahmed, Tanvir and Sakamoto, Noriaki and Anderson, Jason and Hara-Azumi, Yuko},
+	year={2015}
+},
+
+@article{blem_menon_sankaralingam_2013,
+	title={Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures},
+	DOI={10.1109/hpca.2013.6522302},
+	journal={2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)},
+	author={Blem, E. and Menon, J. and Sankaralingam, K.},
+	year={2013}
+},
+
+@book{gilreath_laplante_2003,
+	place={Boston},
+	title={Computer Architecture: A Minimalist Perspective},
+	publisher={Kluwer Academic Publishers},
+	author={Gilreath, William F and Laplante, Phillip A},
+	year={2003}
+},
+
+@book{harris_harris_2013,
+	place={Amsterdam},
+	edition={2},
+	title={Digital design and computer architecture},
+	publisher={Elsevier},
+	author={Harris, David Money and Harris, Sarah L},
+	year={2013}
+},
+
+@article{jamil_1995,
+	title={RISC versus CISC},
+	volume={14},
+	DOI={10.1109/45.464688},
+	number={3},
+	journal={IEEE Potentials},
+	author={Jamil, T.},
+	year={1995},
+	pages={13-16}
+},
+
+@article{kong_ang_seng_adejo_2010,
+	title={Minimal Instruction Set FPGA AES processor using Handel},
+	DOI={10.1109/iccaie.2010.5735100},
+	journal={2010 International Conference on Computer Applications and Industrial Electronics},
+	author={Kong, J. H. and Ang, L.-M. and Seng, K. P. and Adejo, Achonu Oluwole},
+	year={2010}
+}
+
+@article{morain_1989,
+title={Atkin's Test: News from the Front},
+DOI={10.1007/3-540-46885-4_59},
+journal={Lecture Notes in Computer Science},
+author={Morain, François},
+year={1989},
+pages={626-635}
+}