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@@ -0,0 +1,92 @@
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+@article{beldianu_ziavras_2014,
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+ title={ASIC Design of Shared Vector Accelerators for Multicore Processors},
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+ DOI={10.1109/sbac-pad.2014.13},
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+ journal={2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing},
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+ author={Beldianu, Spiridon F. and Ziavras, Sotirios G.},
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+ year={2014}
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+},
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+
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+@article{dharshana_balasubramanian_arun_2016,
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+ title={Encrypted computation on a one instruction set architecture},
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+ DOI={10.1109/iccpct.2016.7530376},
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+ journal={2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT)},
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+ author={Dharshana, K. S. and Balasubramanian, Kannan and Arun, M.},
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+ year={2016}
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+},
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+
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+@article{ong_ang_seng_2010,
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+ title={Implementation of (15, 9) Reed Solomon Minimal Instruction Set Computing on FPGA using Handel-C},
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+ DOI={10.1109/iccaie.2010.5735103},
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+ journal={2010 International Conference on Computer Applications and Industrial Electronics},
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+ author={Ong, Jia Jan and Ang, L.-M. and Seng, K. P.},
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+ year={2010}
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+},
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+
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+@article{yokota_saso_hara-azumi_2017,
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+ title={One-instruction set computer-based multicore processors for energy-efficient streaming data processing},
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+ DOI={10.1145/3130265.3130318},
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+ journal={Proceedings of the 28th International Symposium on Rapid System Prototyping Shortening the Path from Specification to Prototype - RSP '17},
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+ author={Yokota, Minato and Saso, Kaoru and Hara-Azumi, Yuko},
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+ year={2017}
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+}
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+
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+@article{ahmed_sakamoto_anderson_hara-azumi_2015,
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+ title={Synthesizable-from-C Embedded Processor Based on MIPS-ISA and OISC},
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+ DOI={10.1109/euc.2015.23},
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+ journal={2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing},
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+ author={Ahmed, Tanvir and Sakamoto, Noriaki and Anderson, Jason and Hara-Azumi, Yuko},
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+ year={2015}
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+},
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+
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+@article{blem_menon_sankaralingam_2013,
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+ title={Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures},
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+ DOI={10.1109/hpca.2013.6522302},
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+ journal={2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)},
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+ author={Blem, E. and Menon, J. and Sankaralingam, K.},
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+ year={2013}
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+},
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+
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+@book{gilreath_laplante_2003,
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+ place={Boston},
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+ title={Computer Architecture: A Minimalist Perspective},
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+ publisher={Kluwer Academic Publishers},
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+ author={Gilreath, William F and Laplante, Phillip A},
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+ year={2003}
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+},
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+
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+@book{harris_harris_2013,
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+ place={Amsterdam},
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+ edition={2},
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+ title={Digital design and computer architecture},
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+ publisher={Elsevier},
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+ author={Harris, David Money and Harris, Sarah L},
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+ year={2013}
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+},
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+
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+@article{jamil_1995,
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+ title={RISC versus CISC},
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+ volume={14},
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+ DOI={10.1109/45.464688},
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+ number={3},
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+ journal={IEEE Potentials},
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+ author={Jamil, T.},
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+ year={1995},
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+ pages={13-16}
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+},
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+
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+@article{kong_ang_seng_adejo_2010,
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+ title={Minimal Instruction Set FPGA AES processor using Handel},
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+ DOI={10.1109/iccaie.2010.5735100},
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+ journal={2010 International Conference on Computer Applications and Industrial Electronics},
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+ author={Kong, J. H. and Ang, L.-M. and Seng, K. P. and Adejo, Achonu Oluwole},
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+ year={2010}
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+}
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+
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+@article{morain_1989,
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+title={Atkin's Test: News from the Front},
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+DOI={10.1007/3-540-46885-4_59},
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+journal={Lecture Notes in Computer Science},
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+author={Morain, François},
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+year={1989},
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+pages={626-635}
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+}
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