ucl_project_y3/quartus/pll_clk.qip

set_global_assignment -name IP_TOOL_NAME "ALTPLL"
set_global_assignment -name IP_TOOL_VERSION "18.1"
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll_clk.v"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_clk.ppf"]