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ucl_project_y3
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simulation
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modelsim
Min aa42f5562f Project update 6 years ago
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UCL_project_y3_run_msim_rtl_verilog.do aa42f5562f Project update 6 years ago
modelsim.ini de18826119 Added simulation directory 6 years ago
risc8_tb_wave.do aa42f5562f Project update 6 years ago
risc_tb_wave.do 9d5c8e7121 Project restructure 6 years ago
wave.do de18826119 Added simulation directory 6 years ago