references.bib 3.3 KB

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  1. @article{beldianu_ziavras_2014,
  2. title={ASIC Design of Shared Vector Accelerators for Multicore Processors},
  3. DOI={10.1109/sbac-pad.2014.13},
  4. journal={2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing},
  5. author={Beldianu, Spiridon F. and Ziavras, Sotirios G.},
  6. year={2014}
  7. },
  8. @article{dharshana_balasubramanian_arun_2016,
  9. title={Encrypted computation on a one instruction set architecture},
  10. DOI={10.1109/iccpct.2016.7530376},
  11. journal={2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT)},
  12. author={Dharshana, K. S. and Balasubramanian, Kannan and Arun, M.},
  13. year={2016}
  14. },
  15. @article{ong_ang_seng_2010,
  16. title={Implementation of (15, 9) Reed Solomon Minimal Instruction Set Computing on FPGA using Handel-C},
  17. DOI={10.1109/iccaie.2010.5735103},
  18. journal={2010 International Conference on Computer Applications and Industrial Electronics},
  19. author={Ong, Jia Jan and Ang, L.-M. and Seng, K. P.},
  20. year={2010}
  21. },
  22. @article{yokota_saso_hara-azumi_2017,
  23. title={One-instruction set computer-based multicore processors for energy-efficient streaming data processing},
  24. DOI={10.1145/3130265.3130318},
  25. journal={Proceedings of the 28th International Symposium on Rapid System Prototyping Shortening the Path from Specification to Prototype - RSP '17},
  26. author={Yokota, Minato and Saso, Kaoru and Hara-Azumi, Yuko},
  27. year={2017}
  28. }
  29. @article{ahmed_sakamoto_anderson_hara-azumi_2015,
  30. title={Synthesizable-from-C Embedded Processor Based on MIPS-ISA and OISC},
  31. DOI={10.1109/euc.2015.23},
  32. journal={2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing},
  33. author={Ahmed, Tanvir and Sakamoto, Noriaki and Anderson, Jason and Hara-Azumi, Yuko},
  34. year={2015}
  35. },
  36. @article{blem_menon_sankaralingam_2013,
  37. title={Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures},
  38. DOI={10.1109/hpca.2013.6522302},
  39. journal={2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)},
  40. author={Blem, E. and Menon, J. and Sankaralingam, K.},
  41. year={2013}
  42. },
  43. @book{gilreath_laplante_2003,
  44. place={Boston},
  45. title={Computer Architecture: A Minimalist Perspective},
  46. publisher={Kluwer Academic Publishers},
  47. author={Gilreath, William F and Laplante, Phillip A},
  48. year={2003}
  49. },
  50. @book{harris_harris_2013,
  51. place={Amsterdam},
  52. edition={2},
  53. title={Digital design and computer architecture},
  54. publisher={Elsevier},
  55. author={Harris, David Money and Harris, Sarah L},
  56. year={2013}
  57. },
  58. @article{jamil_1995,
  59. title={RISC versus CISC},
  60. volume={14},
  61. DOI={10.1109/45.464688},
  62. number={3},
  63. journal={IEEE Potentials},
  64. author={Jamil, T.},
  65. year={1995},
  66. pages={13-16}
  67. },
  68. @article{kong_ang_seng_adejo_2010,
  69. title={Minimal Instruction Set FPGA AES processor using Handel},
  70. DOI={10.1109/iccaie.2010.5735100},
  71. journal={2010 International Conference on Computer Applications and Industrial Electronics},
  72. author={Kong, J. H. and Ang, L.-M. and Seng, K. P. and Adejo, Achonu Oluwole},
  73. year={2010}
  74. }
  75. @article{morain_1989,
  76. title={Atkin's Test: News from the Front},
  77. DOI={10.1007/3-540-46885-4_59},
  78. journal={Lecture Notes in Computer Science},
  79. author={Morain, François},
  80. year={1989},
  81. pages={626-635}
  82. }