ucl_project_y3/docs/poster/poster.tex

\documentclass[portrait,color=UCLnavyblue,margin=3cm]{uclposter}
\usepackage[scaled=1.2]{helvet}
\renewcommand\familydefault{\sfdefault} 
\usepackage[T1]{fontenc}

\title{Performance characterisation of 8-bit RISC and OISC architectures}

\author[]{Mindaugas Jarmolovicius}

%\affil[1]{UCL Electronic And Electrical Engineering}

\begin{document}

\maketitle

\section*{Introduction}
This is a bunch of text for introductions that describes project, what it is about and that it compares RISC versus OISC architectures.

\begin{multicols}{2}

\section*{RISC}

\begin{highlightbox}
	\begin{description}
		\item[$\bullet$] bunch of instructions
		\item[$\bullet$] efficient instruction space
		\item[$\bullet$] generally easy to use but damn to low number of registers.
		\item[$\bullet$] needs optimisation.
	\end{description}
\end{highlightbox}

%\begin{highlightbox}[UCLdarkblue!20!white]
%\end{highlightbox}

\columnbreak

\section*{OISC}

\begin{highlightbox}
	\begin{description}
			\item[$\bullet$] only one instruction
			\item[$\bullet$] not so efficient instruction space
			\item[$\bullet$] takes forever to write in assembly
			\item[$\bullet$] takes no time to improve. It just asking for more data buses!
	\end{description}
\end{highlightbox}

\end{multicols}

\section*{Results}
This is section with some results if I will have enough time to complete them.. \textbf{RIP MY FREE TIME}.

\section*{Future work}
Explain future work, experiments, oisc improvements.

\end{document}