% !TeX root = index.tex \iffalse The abstract is written last and summarises the important points you are making in the report using one sentence for each point: * What is the topic of the work? What is the goal? * Why are you doing it? What are your motivations? * Does this work appear in the literature and if so, what are you doing differently? * What is the most significant result? Was it unexpected? What impact will it have? \fi One Instruction Set Computer (OISC), commonly implemented as Transport Triggered Architectures (TTAs) is a promising architecture that is successfully used in Application-Specific Instruction Set Processors (ASIPs) exploiting operation style parallelism, while keeping simplicity and flexibility. There is a lack of research in general purpose OISC with single data-instruction bus that could be used in lower power and performance comparable to an 8bit microcontroller using traditional Reduce Instruction Set Computer (RISC) architecture. This report describes the design, implementation and testing of two novel 8bit RISC and OISC-TTA processors, and investigates their characteristics and performance when implemented on FPGA. OISC required only a half of logic elements comparing to RISC, however it takes 71\% longer to execute designed benchmark, showing that OISC would need more than one data-instruction bus to outperform RISC.