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@@ -10,11 +10,15 @@ These types of projects involve the design and construction of some
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electrical or electronic apparatus or device within the bounds
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of the department's educational mandate.
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\fi
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+
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+OISC \texttt{MOVE} has many benefits from VLIW and SIMO or SIMT design, however there is a lack of research investigating and comparing more general purpose OISC \texttt{MOVE} 8bit processor with short instruction word and SISO (single instruction, single operation) configuration. The main theory for building both architectures will be based on following resources \autocite{ong_ang_seng_2010,gilreath_laplante_2003,kong_ang_seng_adejo_2010,dharshana_balasubramanian_arun_2016}.
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+
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+RISC architecture will be mainly based on MIPS architecture explained in \autocite{harris_harris_2013}, except it is 8bit and would have multiple optimisations.
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This project has three main motivations:
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\begin{enumerate}
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\item Compare how well OISC \texttt{MOVE} architecture would perform in low performance microcontroller application comparing to equivalent RISC architecture.
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\item Study and explore computer architectures, SystemVerilog and assembly languages.
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- \item View an alternative method of using OISC \texttt{MOVE} as SISO (single instruction, single operation) architecture, comparing to more commonly implemented TTAs architectures that are either VLIW (very large instruction word) SIMO type (single instruction, multiple operation) or SIMT (single instruction, multiple transports).
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+ \item View an alternative method of using OISC \texttt{MOVE} as SISO architecture, comparing to more commonly implemented TTAs architectures that are either VLIW SIMO type or SIMT.
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\end{enumerate}
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