cleanup

src/blocks/alu.bsf

@@ -1,77 +0,0 @@
-/*
-WARNING: Do NOT edit the input and output ports in this file in a text
-editor if you plan to continue editing the block that represents it in
-the Block Editor! File corruption is VERY likely to occur.
-*/
-/*
-Copyright (C) 2018  Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions 
-and other software and tools, and its AMPP partner logic 
-functions, and any output files from any of the foregoing 
-(including device programming or simulation files), and any 
-associated documentation or information are expressly subject 
-to the terms and conditions of the Intel Program License 
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors.  Please
-refer to the applicable agreement for further details.
-*/
-(header "symbol" (version "1.2"))
-(symbol
-	(rect 64 64 216 168)
-	(text "alu" (rect 120 8 136 19)(font "Arial" ))
-	(text "inst" (rect 104 88 122 99)(font "Arial" ))
-	(port
-		(pt 0 24)
-		(input)
-		(text "src A" (rect 0 0 28 11)(font "Arial" ))
-		(text "src A" (rect 21 19 49 30)(font "Arial" ))
-		(line (pt 0 24)(pt 16 24)(line_width 3))
-	)
-	(port
-		(pt 0 80)
-		(input)
-		(text "src B" (rect 0 0 27 11)(font "Arial" ))
-		(text "src B" (rect 21 75 48 86)(font "Arial" ))
-		(line (pt 0 80)(pt 16 80)(line_width 3))
-	)
-	(port
-		(pt 56 0)
-		(input)
-		(text "op" (rect 0 0 14 11)(font "Arial" ))
-		(text "op" (rect 48 25 59 39)(font "Arial" )(vertical))
-		(line (pt 56 0)(pt 56 16)(line_width 3))
-	)
-	(port
-		(pt 152 40)
-		(output)
-		(text "zero" (rect -104 0 -81 11)(font "Arial" ))
-		(text "zero" (rect 96 32 115 43)(font "Arial" ))
-		(line (pt 152 40)(pt 136 40))
-	)
-	(port
-		(pt 152 56)
-		(output)
-		(text "result" (rect -104 0 -76 11)(font "Arial" ))
-		(text "result" (rect 96 48 124 59)(font "Arial" ))
-		(line (pt 152 56)(pt 136 56)(line_width 3))
-	)
-	(parameter
-		"WORD"
-		"8"
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(drawing
-		(line (pt 16 8)(pt 136 32))
-		(line (pt 136 32)(pt 136 72))
-		(line (pt 16 96)(pt 136 72))
-		(line (pt 56 48)(pt 56 56))
-		(line (pt 16 8)(pt 16 40))
-		(line (pt 16 96)(pt 16 64))
-		(line (pt 16 64)(pt 56 56))
-		(line (pt 16 40)(pt 56 48))
-	)
-	(annotation_block (parameter)(rect 272 -16 448 16))
-)

src/blocks/instr_mem.bsf

@@ -1,70 +0,0 @@
-/*
-WARNING: Do NOT edit the input and output ports in this file in a text
-editor if you plan to continue editing the block that represents it in
-the Block Editor! File corruption is VERY likely to occur.
-*/
-/*
-Copyright (C) 2018  Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions 
-and other software and tools, and its AMPP partner logic 
-functions, and any output files from any of the foregoing 
-(including device programming or simulation files), and any 
-associated documentation or information are expressly subject 
-to the terms and conditions of the Intel Program License 
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors.  Please
-refer to the applicable agreement for further details.
-*/
-(header "symbol" (version "1.2"))
-(symbol
-	(rect 64 64 184 224)
-	(text "instr_mem" (rect 5 0 58 11)(font "Arial" ))
-	(text "inst" (rect 8 144 26 155)(font "Arial" ))
-	(port
-		(pt 64 0)
-		(input)
-		(text "clk" (rect 0 0 15 11)(font "Arial" ))
-		(text "clk" (rect 56 25 67 40)(font "Arial" )(vertical))
-		(line (pt 64 0)(pt 64 17))
-	)
-	(port
-		(pt 0 56)
-		(input)
-		(text "addr" (rect 0 0 23 11)(font "Arial" ))
-		(text "addr" (rect 24 48 47 59)(font "Arial" ))
-		(line (pt 0 56)(pt 16 56)(line_width 3))
-	)
-	(port
-		(pt 120 56)
-		(output)
-		(text "instr" (rect -128 0 -106 11)(font "Arial" ))
-		(text "instr" (rect 72 48 94 59)(font "Arial" ))
-		(line (pt 120 56)(pt 104 56)(line_width 3))
-	)
-	(port
-		(pt 120 72)
-		(output)
-		(text "imm" (rect -128 0 -106 11)(font "Arial" ))
-		(text "imm" (rect 72 64 94 75)(font "Arial" ))
-		(line (pt 120 72)(pt 104 72)(line_width 3))
-	)
-	(parameter
-		"WORD"
-		"8"
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(parameter
-		"SIZE"
-		""
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(drawing
-		(line (pt 56 16)(pt 64 24))
-		(line (pt 64 24)(pt 72 16))
-		(rectangle (rect 16 16 104 136))
-	)
-	(annotation_block (parameter)(rect 264 -32 440 16))
-)

src/blocks/memory.bsf

@@ -1,77 +0,0 @@
-/*
-WARNING: Do NOT edit the input and output ports in this file in a text
-editor if you plan to continue editing the block that represents it in
-the Block Editor! File corruption is VERY likely to occur.
-*/
-/*
-Copyright (C) 2018  Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions 
-and other software and tools, and its AMPP partner logic 
-functions, and any output files from any of the foregoing 
-(including device programming or simulation files), and any 
-associated documentation or information are expressly subject 
-to the terms and conditions of the Intel Program License 
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors.  Please
-refer to the applicable agreement for further details.
-*/
-(header "symbol" (version "1.2"))
-(symbol
-	(rect 64 64 176 248)
-	(text "memory" (rect 5 0 46 11)(font "Arial" ))
-	(text "inst" (rect 8 160 26 171)(font "Arial" ))
-	(port
-		(pt 48 0)
-		(input)
-		(text "clk" (rect 0 0 15 11)(font "Arial" ))
-		(text "clk" (rect 40 25 51 40)(font "Arial" )(vertical))
-		(line (pt 48 0)(pt 48 16))
-	)
-	(port
-		(pt 72 0)
-		(input)
-		(text "wr_en" (rect 0 0 31 11)(font "Arial" ))
-		(text "wr_en" (rect 64 25 75 56)(font "Arial" )(vertical))
-		(line (pt 72 0)(pt 72 16))
-	)
-	(port
-		(pt 0 80)
-		(input)
-		(text "addr" (rect 0 0 23 11)(font "Arial" ))
-		(text "addr" (rect 24 72 47 83)(font "Arial" ))
-		(line (pt 0 80)(pt 16 80)(line_width 3))
-	)
-	(port
-		(pt 0 112)
-		(input)
-		(text "wr_data" (rect 0 0 42 11)(font "Arial" ))
-		(text "wr_data" (rect 24 104 66 115)(font "Arial" ))
-		(line (pt 0 112)(pt 16 112)(line_width 3))
-	)
-	(port
-		(pt 112 80)
-		(output)
-		(text "rd_data" (rect -160 0 -120 11)(font "Arial" ))
-		(text "rd_data" (rect 56 72 96 83)(font "Arial" ))
-		(line (pt 112 80)(pt 96 80)(line_width 3))
-	)
-	(parameter
-		"WORD"
-		"8"
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(parameter
-		"SIZE"
-		""
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(drawing
-		(line (pt 40 16)(pt 48 24))
-		(line (pt 48 24)(pt 56 16))
-		(rectangle (rect 16 16 96 160))
-	)
-	(annotation_block (parameter)(rect 288 -32 464 16))
-)

src/blocks/reg_file.bsf

@@ -1,98 +0,0 @@
-/*
-WARNING: Do NOT edit the input and output ports in this file in a text
-editor if you plan to continue editing the block that represents it in
-the Block Editor! File corruption is VERY likely to occur.
-*/
-/*
-Copyright (C) 2018  Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions 
-and other software and tools, and its AMPP partner logic 
-functions, and any output files from any of the foregoing 
-(including device programming or simulation files), and any 
-associated documentation or information are expressly subject 
-to the terms and conditions of the Intel Program License 
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors.  Please
-refer to the applicable agreement for further details.
-*/
-(header "symbol" (version "1.2"))
-(symbol
-	(rect 64 64 216 240)
-	(text "reg_file" (rect 5 0 42 11)(font "Arial" ))
-	(text "inst" (rect 8 160 26 171)(font "Arial" ))
-	(port
-		(pt 72 0)
-		(input)
-		(text "clk" (rect 0 0 15 11)(font "Arial" ))
-		(text "clk" (rect 64 24 75 39)(font "Arial" )(vertical))
-		(line (pt 72 0)(pt 72 17))
-	)
-	(port
-		(pt 104 0)
-		(input)
-		(text "wr_en" (rect 0 0 31 11)(font "Arial" ))
-		(text "wr_en" (rect 96 24 107 55)(font "Arial" )(vertical))
-		(line (pt 104 0)(pt 104 17))
-	)
-	(port
-		(pt 0 48)
-		(input)
-		(text "rd_addr1" (rect 0 0 46 11)(font "Arial" ))
-		(text "rd_addr1" (rect 24 40 70 51)(font "Arial" ))
-		(line (pt 0 48)(pt 16 48)(line_width 3))
-	)
-	(port
-		(pt 0 64)
-		(input)
-		(text "rd_addr2" (rect 0 0 46 11)(font "Arial" ))
-		(text "rd_addr2" (rect 24 56 70 67)(font "Arial" ))
-		(line (pt 0 64)(pt 16 64)(line_width 3))
-	)
-	(port
-		(pt 0 80)
-		(input)
-		(text "wr_addr" (rect 0 0 41 11)(font "Arial" ))
-		(text "wr_addr" (rect 24 72 65 83)(font "Arial" ))
-		(line (pt 0 80)(pt 16 80)(line_width 3))
-	)
-	(port
-		(pt 0 120)
-		(input)
-		(text "wr_data" (rect 0 0 42 11)(font "Arial" ))
-		(text "wr_data" (rect 24 112 66 123)(font "Arial" ))
-		(line (pt 0 120)(pt 16 120)(line_width 3))
-	)
-	(port
-		(pt 152 96)
-		(output)
-		(text "rd_data2" (rect -152 0 -108 11)(font "Arial" ))
-		(text "rd_data2" (rect 80 88 124 99)(font "Arial" ))
-		(line (pt 152 96)(pt 136 96)(line_width 3))
-	)
-	(port
-		(pt 152 80)
-		(output)
-		(text "rd_data1" (rect -152 0 -108 11)(font "Arial" ))
-		(text "rd_data1" (rect 80 72 124 83)(font "Arial" ))
-		(line (pt 152 80)(pt 136 80)(line_width 3))
-	)
-	(parameter
-		"WORD"
-		"8"
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(parameter
-		"ADDR_SIZE"
-		"2"
-		""
-		(type "PARAMETER_SIGNED_DEC")	)
-	(drawing
-		(line (pt 64 16)(pt 72 24))
-		(line (pt 72 24)(pt 80 16))
-		(rectangle (rect 16 16 136 160))
-	)
-	(annotation_block (parameter)(rect 216 16 392 64))
-)

src/blocks/reg_file_tb.sv

@@ -1 +0,0 @@
-

src/blocks/sign_ext.sv

@@ -1,8 +0,0 @@
-
-module sign_ext(data_in, data_out);
-	parameter WORD=8, EXT=4;
-	input [WORD-1:0]data_in;
-	output logic [WORD-1:0]data_out;
-	
-	
-endmodule