Final report literature review

docs/final_report/3-objectives.tex

@@ -10,32 +10,41 @@ These types of projects involve the design and construction of some
 electrical or electronic apparatus or device within the bounds 
 of the department's educational mandate.
 \fi
+This project has three main motivations:
+\begin{enumerate}
+	\item Compare how well OISC \texttt{MOVE} architecture would perform in low performance microcontroller application comparing to equivalent RISC architecture.
+	\item Study and explore computer architectures, SystemVerilog and assembly languages. 
+	\item View an alternative method of using OISC \texttt{MOVE} as SISO (single instruction, single operation) architecture, comparing to more commonly implemented TTAs architectures that are either VLIW (very large instruction word) SIMO type (single instruction, multiple operation) or SIMT (single instruction, multiple transports).
+\end{enumerate}
 
 
+\iffalse
 This is just a list of research papers and relative context:
-
-
-\autocite{5403730} - TTA instruction redundancy remoal method with base plus offset addressing load/store function unit (LSFU)
-\autocite{4627144} - TTA code compression using arithmetic coding
 \autocite{5936440} - Novel processor for Multiple Instruction Multiple Data packet triggered architecture for pipeline and parallel processing.
-\autocite{1213033} - Another template based compression method to improve code density
 
 
+\autocite{7363689} - Implementing TTA for SDR and focuses on power optimisations. It show ~24.8-26.1\% decrease in power consumption with 3.3\% area increase.
 \autocite{1511285} - Scalable FIR filtering on TTA
 \autocite{289981} - MOVE32INT TTA implementation. Achieved parallel processing with 80MHz 320Mops/s comparing to RISC 20MHz 20Mops/s. Includes automated design
 \autocite{6855236} - Parallel programming of a TTA for LDPC encoding application
 \autocite{922340} - TTA for encryption specific ASIP
-\autocite{4595596} - Focuses on software pipelining and solved with GNU Linear Programming Kit (Very interesting)
-\autocite{1207041} - Try to reduce power by encoding buses thus reducing switching (read a bit more)
-\autocite{6972455} - Reducing VLIW interconnects to achieve 10\% core energy in 4-issue VLIW
-\autocite{7363689} - Implementing TTA for SDR and focuses on power optimisations. It show ~24.8-26.1\% decrease in power consumption with 3.3\% area increase.
-\autocite{8425389} - Using soft cores in comparision to VLIW to have 67\% of resources with up to 88\% improvement in execution time and 21-49\% cost in program size.
 \autocite{8682289} - Low power implementation TTA for FFT
-\autocite{8573494} - Compressive Sensing Applications on ARM Cortex-A15, NIOS II and TTA architectures. TTA has lowest time and power consumption, however about 2.5 higher area to NIOS II
-
 \autocite{6128530} - Implemented TTA that is efficent on RSA calculations, 3 1024bit pairs/s at 100MHz
 \autocite{1540373} - ASIP TTA for matrix inversion.
-\autocite{840031}  - Introduce Test space exploration costs for TTA templates.
 \autocite{6403142} - A novel microachitecture that combines VLIW and TTA for different applications. Takes less area than existing TTA and VLIW
-\autocite{6893206} - Instruction template based compression method for TTA processors
+\autocite{8573494} - Compressive Sensing Applications on ARM Cortex-A15, NIOS II and TTA architectures. TTA has lowest time and power consumption, however about 2.5 higher area to NIOS II
+
+\autocite{840031}  - Introduce Test space exploration costs for TTA templates.
+
+
+\autocite{4595596} - Focuses on software pipelining and solved with GNU Linear Programming Kit (Very interesting)
+\autocite{8425389} - Using soft cores in comparision to VLIW to have 67\% of resources with up to 88\% improvement in execution time and 21-49\% cost in program size.
 
+
+\autocite{5403730} - TTA instruction redundancy remoal method with base plus offset addressing load/store function unit (LSFU)
+\autocite{6972455} - Reducing VLIW interconnects to achieve 10\% core energy in 4-issue VLIW
+\autocite{1207041} - Try to reduce power by encoding buses thus reducing switching (read a bit more)
+\autocite{4627144} - TTA code compression using arithmetic coding
+\autocite{1213033} - Another template based compression method to improve code density
+\autocite{6893206} - Instruction template based compression method for TTA processors
+\fi

docs/final_report/index.tex

@@ -4,16 +4,15 @@
 \usepackage[utf8]{inputenc}
 %\usepackage{newunicodechar}
 %\usepackage{lmodern}
-%\usepackage{textgreek}
+\usepackage{textgreek}
 \usepackage{amsmath}
 \usepackage{mathtools}
 \usepackage{graphicx}
 \usepackage{float}
-\usepackage{caption}
+\usepackage[format=plain,labelfont={bf,it},font=it]{caption}
 \usepackage{enumitem}
 \usepackage{lipsum}
 \usepackage{listings}
-\usepackage{balance}
 
 
 \usepackage{tabularx}
@@ -36,7 +35,7 @@
 \counterwithin{figure}{subsection}
 \counterwithin{table}{subsection}
 
-\usepackage[backend=bibtex]{biblatex}
+\usepackage[backend=bibtex,style=numeric,sorting=none]{biblatex}
 \addbibresource{references.bib}
 
 % Our base colours
@@ -114,21 +113,27 @@
 	\pagebreak
 	\section{Abstract}\label{sec:abstract}
 	\input{1-abstract.tex}
+	
 	\section{Introduction}\label{sec:introduction}
 	\input{2-introduction.tex}
-	\section{Goals and Objective}\label{sec:objectives}
+
+	\section{Goals and Objectives}\label{sec:objectives}
 	\input{3-objectives.tex}
+
 	\section{Theory and Analytical Bases}\label{sec:theory}
 	\input{4-theory.tex}
+
 	\section{Technical Method}\label{sec:methods}
 	\input{5-methods.tex}
+
 	\section{Results and Analysis}\label{sec:results}
 	\input{6-results.tex}
+
 	\section{Conclusion}\label{sec:conclusion}
 	\input{7-conclusion.tex}
+
 	\section{References}
 	\printbibliography
-	\pagebreak
 	\onecolumn
 	\section{Appendix}\label{sec:appendix}
 	\input{8-appendix.tex}