Finalised poster & presentation

docs/poster/poster.tex

@@ -22,13 +22,13 @@
 \definecolor{c3}{HTML}{a6ddb7} 
 \newcommand{\strutm}{\rule[-.15\baselineskip]{0pt}{\baselineskip}}
 
-\begin{tcolorbox}[title=Introduction]
+\begin{tcolorbox}[title=Introduction,before skip=10pt]
 	\begin{Row}\begin{Cell}{2}
 	\textbf{Motivation:}\\
 	RISC (Reduced Instruction Set Computer) architecture is usually chosen over CISC (Complex Instruction Set Computer) due to simplicity and lower power consumption. This project goes one step further and investigates OISC (One Instruction Set Computer) MOVE variant architecture to determinate if it can achieve even better performance.
 	\end{Cell}\begin{Cell}{2}
 	\textbf{About:}\\
-	The aim of this project was to design two novel RISC and OSIC architectures with following points:
+	The aim of this project was to design two novel RISC and OSIC​ architectures​ with following points:
 	\begin{description}
 		\item[$\bullet$] Design processors such that could be used for microcontroller application (like 8-bit Atmel AVR)
 		\item[$\bullet$] Use same design criteria to make fair comparison
@@ -181,7 +181,7 @@
 \end{multicols}
 
 
-\begin{tcolorbox}[title=Results]
+\begin{tcolorbox}[title=Results,beforeafter skip=22pt]
 	\begin{multicols}{3}
 		\textbf{Implemented functions in assembly:}
 		\begin{description}
@@ -213,7 +213,7 @@
 		\columnbreak
 		\includegraphics[width=\linewidth]{../tests/power.eps}
 		\begin{center}
-			\textit{Figure 4: Measured power of processors when implemented on FPGA, running 16bit multiplication function in loop.}
+			\textit{Figure 4: Measured power of processors when implemented on FPGA, running 16bit multiplication function in loop. None indicates auxiliary-only power}
 		\end{center}
 
 	\end{multicols}
@@ -274,9 +274,8 @@
 		\item[$\bullet$] Processor achieved similar performance in power consumption and FPGA resources
 		\item[$\bullet$] OISC seems to be \textbf{easier} to implement and expand, easily enabling \textbf{pipelining} with hazard control implemented by software.
 		\item[$\bullet$] OISC takes more instructions to perform same function.
-		\item[$\bullet$] OISC assembly is more difficult to write.
+		\item[$\bullet$] OISC assembly is more difficult to write, however this can be optimised with higher level compiler.
 		\item[$\bullet$] Further research is need to investigate benefits of multi-data-bus OISC design.
-		\\[1mm]
 	\end{description}
 \end{tcolorbox}	
 
@@ -291,20 +290,24 @@
 			\item[\textendash] Other minimalistic cryptographic functions
 		\end{description}
 	
-		\textbf{Short term work:}
+		\textbf{Investigate:}
 		\begin{enumerate}
-			\item Investigate critical path and maximum frequencies
-			\item Find power activity factor
-			\item Implement OISC emulator for easier debugging
+			\item Critical path and maximum frequencies
+			\item Power activity factor
+			\item Most commonly used instructions and patterns 
+			\item Compare instruction memory efficiency
+			\\[-7pt] 
 		\end{enumerate}
 		\columnbreak
 		\textbf{Future research:}
 		\begin{enumerate}
+			\item Implement OISC emulator for easier debugging
 			\item Implement multiple data \& instruction buses for OISC
 			\item Write higher level language compiler (such as BASIC or C)
 			\item Expand to 16bit / 32bit data bus
-			\item Compare to commercial Atmel AVR / ARM / MIPS  architectures
+			\item Compare to commercial Atmel AVR / ARM / MIPS  architectures		
 		\end{enumerate}
+		\hspace*{\fill}\textit{Poster No.} \large\textbf{C27}
 	\end{multicols}
 
 \end{tcolorbox}

docs/tests/cycles.m

@@ -3,24 +3,30 @@ close all
 %set(0,'DefaultTextFontname', 'CMU Serif')
 %set(0,'DefaultAxesFontName', 'CMU Serif')
 %text(0.5, 0.8, '\textsf{sans serif}','interpreter','latex')
+
+    %NaN 963;  div ffff/0001
+    %NaN 663;  div ffff/ffff
+    %NaN 598;  div 0001/ffff
+
 data = [
-    NaN 963;
-    NaN 663;
-    NaN 598;
-    618 1076;
-    59 99;
-    27 49;
-    52 55];
+    208 204
+    361 534
+    618 1076
+    59 99
+    27 49
+    52 55
+];
 grid on
 legend
-B = bar(1:7,data);
-x_labels{1} = sprintf('Divide FFFFh/0001h');
-x_labels{2} = sprintf('Divide FFFFh/FFFFh');
-x_labels{3} = sprintf('Divide 0001h/FFFFh');
-x_labels{4} = sprintf('Module FFFFh/0001h');
-x_labels{5} = sprintf('Module FFFFh/FFFFh');
-x_labels{6} = sprintf('Module 0001h/FFFFh');
-x_labels{7} = sprintf('Multiply 16bit');
+B = bar(1:length(data),data);
+x_labels = [
+    {'Print Decimal 0000h'}
+    {'Print Decimal FFFFh'}
+    {'Modulus FFFFh%0001h'}
+    {'Modulus FFFFh%FFFFh'}
+    {'Modulus 0001h%FFFFh'}
+	{'Multiply 16bit'}
+];
 set(gca,'XTickLabel', x_labels);
 %x_labels = [
     %{'\begin{tabular}{r}Divide\\FFFFh/0001h\end{tabular}'}
@@ -35,11 +41,11 @@ set(gca,'XTickLabel', x_labels);
 title("Processor cycles per function")
 ylabel("Numer of cycles")
 xtickangle(30);
-xtips1 = [1:7] - 0.21;
+xtips1 = [1:length(data)] - 0.21;
 ytips1 = B(1).YData;
 labels1 = string(B(1).YData);
 text(xtips1,ytips1,labels1,'HorizontalAlignment','center','VerticalAlignment','bottom');
-xtips2 = [1:7] + 0.21;
+xtips2 = [1:length(data)] + 0.25;
 ytips2 = B(2).YData;
 labels2 = string(B(2).YData);
 text(xtips2,ytips2,labels2,'HorizontalAlignment','center','VerticalAlignment','bottom');