usci.h 2.8 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798
  1. /*
  2. MSP430 Emulator
  3. Copyright (C) 2020 Rudolf Geosits (rgeosits@live.esu.edu)
  4. "MSP430 Emulator" is free software: you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation, either version 3 of the License, or
  7. (at your option) any later version.
  8. "MSP430 Emulator" is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program. If not, see <https://www.gnu.org/licenses/>.
  14. */
  15. #pragma once
  16. #include <stdlib.h>
  17. #include <stdio.h>
  18. #include <stdint.h>
  19. #include <fcntl.h>
  20. #include "../cpu/registers.h"
  21. #include "../utilities.h"
  22. // USCI_Ax Control Register 0
  23. typedef struct Ctl0
  24. {
  25. bool UCPEN; // Parity Enable: Disabled (0) Enabled (1)
  26. bool UCPAR; // Parity Select: Odd (0) Even (1)
  27. bool UCMSB; // MSB first: LSB first (0) MSB first (1)
  28. bool UC7BIT; // Char Len: 8-bit (0) 7-bit (1)
  29. bool UCSPB; // Stop bit select: One STP bits (0) Two STP bits (1)
  30. // USCI Mode - When UCSYNC = 0, its asynchronous mode
  31. // UART Mode (00)
  32. // Idle-line multiprocessor mode (01)
  33. // Address-bit multiprocessor mode (10)
  34. // UART mode with automatic baud rate detection (11)
  35. uint8_t UCMODE;
  36. bool UCSYNC; // Synchronous mode enable: Async (0) Sync (1)
  37. } Ctl0;
  38. // USCI_Ax Control Register 1
  39. typedef struct Ctl1 {
  40. // USCI clock source select, these bits select the Baud rate source clock.
  41. // UCLK: 00 | ACLK: 01 | SMCLK: 10 | SMCLK: 11
  42. uint8_t UCSSEL;
  43. bool UCRXEIE; // Recv erroneous-character interrupt enable
  44. bool UCBRKIE; // receive break character interrupt enable
  45. // dormant. Puts SCI into sleep mode:
  46. // 0 - Not dormant. All received chars will set UCAxRXIFG
  47. // 1 - Dormant. Only chars that are preceded by an idle line or addr bit
  48. bool UCDORM;
  49. // Transmit address, Next frame to be transmitted will be marked as address
  50. // Depedning on the selected multiproc mode. Data (0) Address (1)
  51. bool UCTXADDR;
  52. // Transmit break, transmits a break with the next write to the TX buffer
  53. // Not a break (0) Transmit a break (1)
  54. bool UCTXBRK;
  55. // Software reset enable:
  56. // Disabled. USCI reset released for operation (0)
  57. // Enabled. USCI logic held in reset start. (1)
  58. bool UCSWRST;
  59. } Ctl1;
  60. typedef struct Usci
  61. {
  62. // USCI_A0 Module Register Pointers
  63. uint8_t *UCA0CTL0;
  64. uint8_t *UCA0CTL1;
  65. uint8_t *UCA0BR0;
  66. uint8_t *UCA0BR1;
  67. uint8_t *UCA0MCTL;
  68. uint8_t *UCA0STAT;
  69. uint8_t *UCA0RXBUF;
  70. uint8_t *UCA0TXBUF;
  71. uint8_t *UCA0ABCTL;
  72. uint8_t *UCA0IRTCTL;
  73. uint8_t *UCA0IRRCTL;
  74. uint8_t *IFG2;
  75. Ctl0 ctl0;
  76. Ctl1 ctl1;
  77. }
  78. Usci;
  79. void setup_usci(Emulator *emu);
  80. void handle_usci(Emulator *emu);