Oliver Jaison
c09c9b7289
pipelined stages and abstracted overflow limit
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4 vuotta sitten | |
|---|---|---|
| fpa | 4 vuotta sitten | |
| scripts | 4 vuotta sitten | |
| simulation | 4 vuotta sitten | |
| src | 4 vuotta sitten | |
| .gitignore | 5 vuotta sitten | |
| Makefile | 4 vuotta sitten | |
| altera_devel.qpf | 5 vuotta sitten | |
| altera_devel.qsf | 4 vuotta sitten | |
| readme.md | 4 vuotta sitten |
readme.md
Altera Development Repo
Setup
Just run analysis
make analysis
if not working, specify Quartus installation directory with QUARTUS_ROOT parameter
Start modelsim GUI
make modelsim
Running testbench
This will run test testbench in console without opening modelsim GUI
make tb_file=${file} tb_mod=${module} testbench
# Example
make tb_file=./src/root.sv tb_mod=root_tb testbench
Running testbench with defined simulation tcl script. Scripts has be located in simulation/modelsim/sim_*.do
# GUI example for simulation/modelsim/sim_root_tb.do
make sim_root_tb.gui
# Without GUI
make sim_root_tb.cli