altera_devel/fpa/FPA_module_test.sv

module floating_add #(parameter N=16)(a, b, c);
	input logic [N-1:0] a, b; 
	output logic [N-1:0] c;

	logic flag_a;
	logic flag_b;
	logic abs;
	
	// sign_x = x[N-1]
	// exponent_x = x[N-2:N-6]
	// mantissa_x = x[N-7:0]
	
	assign c[N-1] = a[N-1] ^ b[N-1];
	
	always_comb
		begin
			if (a[N-2:N-6] > b[N-2:N-6])
				begin
					flag_a = 1;
					flag_b = 0;
					abs = a[N-2:N-6] - b[N-2:N-6];
					c[N-2:N-6] = a[N-2:N-6];
				end
			else if (b[N-2:N-6] > a[N-2:N-6])
				begin
					flag_a = 0;
					flag_b = 1;
					abs = b[N-2:N-6] - a[N-2:N-6];
					c[N-2:N-6] = b[N-2:N-6];
				end
			else 
				begin
					flag_a = 1;
					flag_b = 1;
					abs <= 0;
					c[N-2:N-6] = a[N-2:N-6];
				end
		end
		
	always_comb
		begin 
			if (abs > 4'b1000)
				begin
					if (flag_a & ~flag_b) c = a;
					else if (~flag_a & flag_b) c = b;
					else c <= a;
				end
			else
				begin
					if (flag_a & ~flag_b) 
						c[N-7:0] = a[N-7:0] + (b[N-7:0] >> abs);
					else if (~flag_a & flag_b) 
						c[N-7:0] = b[N-7:0] + (a[N-7:0] >> abs);
					else c[N-7:0] <= b[N-7:0] << 1;
				end
		end
endmodule