// synopsys translate_off `timescale 1 ps / 1 ps // synopsys translate_on /* ______ _________ w[i] =>| MULT |==>| | x[i] =>|______| | | ______ | | w[i+1] =>| MULT |==>| CASCADE | _____ x[i+1] =>|______| | | b =>| ADD | . | ADDER |====>|_____|==> y . | | ______ | | w[M-1] =>| MULT |==>| | x[M-1] =>|______| |_________| */ module neuron#(parameter K, N=32)(x, y, w, b, ack, stb, right, clk, rst); localparam M = 2**K; input wire [N-1:0] x [M-1:0]; input wire [N-1:0] w [M-1:0]; input wire [N-1:0] b; output logic [N-1:0] y; input wire clk; input wire rst; output wire [M-1:0] ack; input wire [M-1:0] stb; abus_io inner_io0[M-1:0](); abus_io inner_io1(); abus_io right; wire [N-1:0] inner_w [M-1:0]; wire [N-1:0] casc_w; genvar i; generate for(i=0;i