debugging tb

src/FPA_module_test.sv

@@ -1,7 +1,7 @@
-module floating_add #(parameter N=16, M=4)(a, b, c);
+module floating_add #(parameter N=16, M=4)(a, b, c, flag_double);
 	input logic [N-1:0] a, b; 
 	output logic [N-1:0] c;
-	output logic flag_double;
+	output flag_double;
 
 	logic flag_a;
 	logic flag_b;
@@ -21,7 +21,7 @@ module floating_add #(parameter N=16, M=4)(a, b, c);
 					flag_b = 0;
 					abs = a[N-2:N-2-M] - b[N-2:N-2-M];
 					// ASsigning overall sign of the output
-					assign c[N-1] = a[N-1];
+					c[N-1] = a[N-1];
 					// Sets output to have the same exponent
 					c[N-2:N-2-M] = a[N-2:N-2-M];
 				end
@@ -32,7 +32,7 @@ module floating_add #(parameter N=16, M=4)(a, b, c);
 					flag_b = 1;
 					abs = b[N-2:N-2-M] - a[N-2:N-2-M];
 					// ASsigning overall sign of the output
-					assign c[N-1] = b[N-1];
+					c[N-1] = b[N-1];
 					// Sets ouput to have the same exponent
 					c[N-2:N-2-M] = b[N-2:N-2-M];
 				end
@@ -43,8 +43,8 @@ module floating_add #(parameter N=16, M=4)(a, b, c);
 					flag_b = 1;
 					abs <= 0;
 					// ASsigning overall sign of the output based on size of the mantissa
-					if (a[N-3-M:0] >= b[N-3-M:0]) assign c[N-1] = a[N-1];
-					else assign c[N-1] = b[N-1];
+					if (a[N-3-M:0] >= b[N-3-M:0]) c[N-1] = a[N-1];
+					else c[N-1] = b[N-1];
 					c[N-2:N-2-M] = a[N-2:N-2-M];
 				end
 		end
@@ -56,7 +56,7 @@ module floating_add #(parameter N=16, M=4)(a, b, c);
 				begin
 					if (flag_a & ~flag_b) c = a;
 					else if (~flag_a & flag_b) c = b;
-					else c <= a;
+					else c = a;
 				end
 			else
 				begin
@@ -105,7 +105,7 @@ endmodule : floating_add
 
 
 
-module floating_product #(parameter N=16, M=4)(a, b, c);
+module floating_product #(parameter N=16, M=4)(a, b, c, underflow, zero_flag);
 	input logic [N-1:0] a, b;
 	output logic [N-1:0] c;
 	output logic underflow, zero_flag;
@@ -193,55 +193,44 @@ endmodule : FP2Integer
 
 
 
-module floating_add_tb;
+module floating_tb;
 	reg reset, clk;
-	logic [15:0] input_a, input_b, result_add;
-	wire flag_double;
+	logic [15:0] input_a, input_b, result_add, result_mult;
+	wire flag_double, underflow, zero_flag;
+
+	floating_add adder1(.a(input_a), .b(input_b), .c(result_add), .flag_double(flag_double));
+	floating_product multiplier1(.a(input_a), .b(input_b), .c(result_mult), .underflow(underflow), .zero_flag(zero_flag));
 
-	floating_add adder1(.a(input_a), .b(input_b), .c(result_add));
 
 	reg [15:0] test_mem [29:0][3:0];
 
 	initial $readmemh("../../scripts/fp16_test.hex", test_mem);
 
-	// task test_inputs;
-	// 	input [15:0] in_a, in_b, expected_c;
-	// 	assign a = in_a;
-	// 	assign b = in_b;
-	// 	#2ps;
-	// 	if(c == expected_c) $display("PASS: a=%b b=%b c=%b", a,b,c);
-	// 	else $error("FAIL: a=%b b=%b c=%b, expected c=%b", a,b,c,expected_c);
-	// 	#2ps;
-	// endtask : test_inputs
-
-	initial begin
-		foreach(test_mem[i]) begin
-			input_a = test_mem[i][0];
-			input_b = test_mem[i][1];
-			#10;
-
-		end
-	end
-endmodule : floating_add_tb
-
-
-
-module floating_product_tb;
-	logic [15:0] a, b, c;
-	floating_product multiplier1(a, b, c);
-
-	task test_inputs;
-		input [15:0] in_a, in_b, expected_c;
-		assign a = in_a;
-		assign b = in_b;
-		#2ps;
-		if(c == expected_c) $display("PASS: a=%b b=%b c=%b", a,b,c);
-		else $error("FAIL: a=%b b=%b c=%b, expected c=%b", a,b,c,expected_c);
-		#2ps;
-	endtask : test_inputs
 
 	initial begin
-		test_inputs(16'b0, 16'b0_01111_0000000000, 16'b0);
-		$finish();
+        static int num_err = 0;
+        static int num_tests = $size(test_mem) * 2;
+
+        for (int i=0; i < $size(test_mem); i++) begin
+            input_a = test_mem[i][0];
+            input_b = test_mem[i][1];
+
+            #10;
+            if(result_add != test_mem[i][2]) begin
+                if(num_err < 20)
+                    $display("FAIL ADD: %H + %H = %H, expected %H", input_a, input_b, result_add, test_mem[i][2]);
+                num_err = num_err + 1;
+            end
+
+			if(result_mult != test_mem[i][3]) begin
+                if(num_err < 20)
+                    $display("FAIL MULTIPLY: %H + %H = %H, expected %H", input_a, input_b, result_mult, test_mem[i][3]);
+                num_err = num_err + 1;
+            end
+
+        end
+
+        $display("Passed %d of %d tests", num_tests-num_err, num_tests);
+        $finish();
 	end
-endmodule : floating_product_tb
+endmodule : floating_tb