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multiplying pipelining yet again

Oliver Jaison 4 anni fa
parent
commit
688339f1fb
1 ha cambiato i file con 32 aggiunte e 8 eliminazioni
  1. 32 8
      src/FPA_module_test.sv

+ 32 - 8
src/FPA_module_test.sv

@@ -72,7 +72,7 @@ module floating_add #(parameter N=16, M=4)(input_1, input_2, sum, diff, clk, res
 		end
 		
 		//Second pipeline stage 1
-		pipe pipe0(.clk(clk), .reset(reset), .D(Q0), .Q(Q1));
+		pipe pipe1(.clk(clk), .reset(reset), .D(Q0), .Q(Q1));
 		
 	always_comb
 		begin
@@ -152,8 +152,9 @@ endmodule : floating_add
 
 
 
-module floating_product #(parameter N=16, M=4)(input_1, input_2, product);
+module floating_product #(parameter N=16, M=4)(input_1, input_2, product, clk, reset);
 	input logic [N-1:0] input_1, input_2;
+	input logic clk, reset;
 	output logic [N-1:0] product;
 
 	// sign_x = x[N-1]
@@ -162,19 +163,42 @@ module floating_product #(parameter N=16, M=4)(input_1, input_2, product);
 
 	logic [N-2:N-2-M] sum;
 	logic [2*(N-3-M):0] mult;
+	logic [2*(N-3-M):0] D0 [4:0];
+	logic [2*(N-3-M):0] Q0 [4:0];
+	logic [2*(N-3-M):0] Q1 [4:0];
+	logic [2*(N-3-M):0] Q2 [4:0];
+	
+	// First pipeline stage
+	always_comb
+		begin
+			D0[0] = input_1;
+			D0[1] = input_2;
+			D0[2] = 0; // product
+			D0[3] = 0; // sum
+			D0[4] = 0; // mult
+		end
+		
+	pipe pipe0(.clk(clk), .reset(reset), .D(D0), .Q(Q0));
 
 	// We have assigned an {M+1} bit exponent so we must have a 2^{M} offset
-	assign sum = input_1[N-2:N-2-M] + input_2[N-2:N-2-M];
-	assign product[N-2:N-2-M] = sum - (1'b1 << M) + 2;
+	assign Q0[3] = Q0[0][N-2:N-2-M] + Q0[1][N-2:N-2-M];
+	assign Q0[2][N-2:N-2-M] = Q0[3] - (1'b1 << M) + 2;
+	
+	// Second pipeline stage
+	pipe pipe1(.clk(clk), .reset(reset), .D(Q0), .Q(Q1));
 
 	always_comb
 		begin
 				// Setting the mantissa of the output
-				mult = input_1[N-3-M:0] * input_2[N-3-M:0];
-				if (mult[N-3-M]) product[N-3-M:0] = mult[2*(N-3-M):2*(N-3-M)-9];
-				else product[N-3-M:0] = mult[2*(N-3-M):2*(N-3-M)-9] << 1;
-				product[N-1] = input_1[N-1] ^ input_2[N-1];
+				Q1[4] = Q1[0][N-3-M:0] * Q1[1][N-3-M:0];
+				if (Q1[4][N-3-M]) Q1[2][N-3-M:0] = Q1[4][2*(N-3-M):2*(N-3-M)-9];
+				else Q1[2][N-3-M:0] = Q1[4][2*(N-3-M):2*(N-3-M)-9] << 1;
+				Q1[2][N-1] = Q1[0][N-1] ^ Q1[1][N-1];
 		end
+	
+	// Third pipeline stage
+	pipe pipe2(.clk(clk), .reset(reset), .D(Q1), Q(Q2));
+	assign product = Q2[2][N-1:0];
 endmodule : floating_product