Fixed typos

src/fpu16/fp_adder.sv

@@ -1,5 +1,5 @@
 module fp_adder #(parameter N=16, M=4)(input_a, input_b, output_z, clk, reset);
-	input logic [N-1:0] input_a, input_a;
+	input logic [N-1:0] input_a, input_b;
 	input logic clk, reset;
 	output logic [N-1:0] output_z;
 	

src/fpu16/fp_product.sv

@@ -1,5 +1,5 @@
-module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
-	input logic [N-1:0] input_a, input_a;
+module fp_product #(parameter N=16, M=4)(input_a, input_b, output_z, clk, reset);
+	input logic [N-1:0] input_a, input_b;
 	input logic clk, reset;
 	output logic [N-1:0] output_z;
 	
@@ -25,6 +25,7 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 			b_s <= b[N-1];
 			b_e <= b[N-2:N-2-M];
 			b_m <= b[N-3-M:0];
+			output_z <= z;
 		end
 		else
 		begin
@@ -36,7 +37,8 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 			b <= 0;
 			b_s <= 0;
 			b_e <= 0;
-			b_m <= 0;			
+			b_m <= 0;
+			output_z <= 0;
 		end
 	end
 	
@@ -63,7 +65,7 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 					z_e <= (1 << (M+1)) - 1;
 					z_m[N-3-M] <= 1;
 					z_m[N-4-M] <= 0;
-					flags <= 2b'01;
+					flags <= 2'b01;
 				end
 				else
 				// Returning infinity
@@ -71,11 +73,11 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 					z_s <= a_s ^ b_s;
 					z_e <= (1 << (M+1)) - 1;
 					z_m <= 0;
-					flags <= 2b'10;
+					flags <= 2'b10;
 				end
 			end
 			// If b is infinity then return infinity
-			else if (b_s (1<<M))
+			else if (b_s == (1<<M))
 			begin
 				//Unless a is zero, then return NaN instead
 				if (($signed(a_e) == (-1*((1<<M)-1))) && a_m == 0)
@@ -84,7 +86,7 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 					z_e <= (1 << (M+1)) - 1;
 					z_m[N-3-M] <= 1;
 					z_m[N-4-M] <= 0;
-					flags <= 2b'01;
+					flags <= 2'b01;
 				end
 				else
 				// Returning infinity
@@ -92,7 +94,7 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 					z_s <= a_s ^ b_s;
 					z_e <= (1 << (M+1)) - 1;
 					z_m <= 0;
-					flags <= 2b'10;
+					flags <= 2'b10;
 				end
 			end
 			// If either input is zero then return zero
@@ -179,6 +181,5 @@ module fp_product #(parameter N=16, M=4)(input_a, input_a, ouput_z, clk, reset);
 			z <= 0;
 		end
 	end
-	
-	output_z <= z;
+
 endmodule : fp_product

src/fpu16/fpu16.sv

@@ -1,9 +1,13 @@
-module floating_tb;
+`include "fp_adder.sv"
+`include "fp_product.sv"
+
+
+module fpu16_tb;
 	reg reset, clk;
 	logic [15:0] input_a, input_b, result_add, result_mult;
 	logic [15:0] expected_add, expected_mult;
 
-	fp_adder adder1(.input_a(input_a), .input_a(input_b), .output_z(result_add), .clk(clk), .reset(reset));
+	fp_adder adder1(.input_a(input_a), .input_b(input_b), .output_z(result_add), .clk(clk), .reset(reset));
 
 	fp_product multiplier1(.input_a(input_a), .input_b(input_b), .output_z(result_mult), .clk(clk), .reset(reset));
 	
@@ -12,7 +16,7 @@ module floating_tb;
 
 	reg [15:0] test_mem [29:0][3:0];
 
-	initial $readmemh("../scripts/fp16_test.hex", test_mem);
+	initial $readmemh("scripts/fp16_test.hex", test_mem);
 
 	initial begin
         static int num_err = 0;
@@ -55,4 +59,4 @@ module floating_tb;
         $display("Passed %d of %d tests", num_tests-num_err, num_tests);
         $finish();
 	end
-endmodule : floating_tb
+endmodule : fpu16_tb